Description: VHDL语言实现的CRC校验，函数形式，包括CRC4,CRC8,CRC16和CRC32-VHDL language to achieve the CRC checksum, function forms, including CRC4, CRC8, CRC16 and CRC32 Platform: |
Size: 2048 |
Author:李浩 |
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Description: crc 校验，vhdl源码，经仿真能正常运行，供大家参考-CRC checksum, vhdl source, the simulation can be normal operation, for your reference Platform: |
Size: 1024 |
Author:fangliang |
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Description: Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks.
External hardware accelerator is used for network packet processing. The common network tasks include CRC and Checksum calculations that are used for validation of data integrity in the network packets.
The accelerator unit is able to perform a checksum and CRC calculation autonomously without CPU interactions using a build in DMA mechanism.
-Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks.
External hardware accelerator is used for network packet processing. The common network tasks include CRC and Checksum calculations that are used for validation of data integrity in the network packets.
The accelerator unit is able to perform a checksum and CRC calculation autonomously without CPU interactions using a build in DMA mechanism.
Platform: |
Size: 2388992 |
Author:Amit Adoni |
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Description: ldpc译码器的部分校验和的原理图转化为VHDL语言。-ldpc decoder part of the checksum of the schematic diagram into VHDL language. Platform: |
Size: 3072 |
Author: |
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Description: CRC循环校验码的生成。文件里是（40，32）的校验码生成电路，采用串行输入、串行输出的方式。-CRC checksum generation cycle. File is (40,32) of the check code generation circuit, the use of serial input, serial output mode. Platform: |
Size: 143360 |
Author:李雪茹 |
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Description: 用软件实现CRC校验码计算很难满足高速数据通信的要求， 基于硬件的实现方法中， 有串行经典算法LFSR,电路以及由软件算法推导出来的其它各种并行计算方法。以经典的LFSR,电路为基础， 研究了按字节并行计算CRC校验码的原理.-Implemented in software CRC checksum calculation is difficult to meet the requirements of high-speed data communications, hardware-based implementations, there are classic serial algorithm LFSR, circuits and software algorithms derived from the other kinds of parallel computing. To the classic LFSR, circuit-based, study by the CRC byte parallel computing principles. Platform: |
Size: 205824 |
Author:Geer |
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Description: 赛灵思的循环冗余校验（CRC），内服详细说明-The Cyclic Redundancy Check (CRC) is a checksum technique for testing data reliability and
correctness. This application note shows how to implement Configurable CRC Modules with
LocalLink interfaces. Users tailor the module features to suit the protocol or application
implemented in their system. The user-specified options for each of the configurable features
are input parameters to the VHDL code for the modules. The VHDL source files for the CRC
modules are coded using generate statements. The modules have two LocalLink interfaces: an
upstream interface (US) and a downstream interface (DS) Platform: |
Size: 210944 |
Author:我是谁 |
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